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| FAN7384 Half-Bridge Gate-Drive IC February 2007 FAN7384 Half-Bridge Gate-Drive IC Features Floating Channel for Bootstrap Operation to +600V Typically 250mA/500mA Sourcing/Sinking Current Driving Capability for Both Channels Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V Matched Propagation Delay Below 50ns Output In-Phase with Input Signal 3.3V and 5V Input Logic Compatible Built-in Shoot-Through Prevention Logic Built-in Common Mode dv/dt Noise Canceling Circuit Built-in UVLO Functions for Both Channels Built-in Cycle-by-Cycle Shutdown Function Built-in Soft-Off Function Built-in Bi-Directional Fault Function Built-in Short-Circuit Protection Function Description The FAN7384 is a monolithic half-bridge gate-drive IC designed for high voltage, high speed driving MOSFETs and IGBTs operating up to +600V. Fairchild's high-voltage process and common-mode noise canceling technique provide stable operation of high-side drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS = -9.8V (typical) for VBS =15V. The UVLO circuits prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 250mA/500mA, respectively, which is suitable for half-bridge and fullbridge applications in motor drive systems. 14-SOP Applications Motor Inverter Driver Normal Half-Bridge and Full-Bridge Driver Switching Mode Power Supply 1 Ordering Information Part Number FAN7384M(1) FAN7384MX(1) Package 14-SOP Pb-Free Yes Operating Temperature Range -40C ~ 125C Packing Method Tube Tape & Reel Note: 1. These devices passed wave soldering test by JESD22A-111. (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Application Diagrams VDC VCC VDD VB HO VS UU UL VU UL WU WL HIN LIN VDD HO VDD HO U U HIN LIN FAN7384 VB VS FAN7384 FAN7384 3-Phase Motor Controller V HIN LIN FO SD V VB VS W W FO SD CSC VSL LO GND FO SD CSC VSL LO GND CSC VSL LO GND FAN7384 Rev.03 Figure 1. 3-Phase Motor Drive Application VDC VCC RPULLUP VDD VB HO VDD VB HO PHA PHB HIN HIN VS FAN7384 Forward FAN7384 VS LIN HIN FO SD LO 300K FO M Reverse LO FAULT SHUTDOWN SD 300K GND VSL CSC DC Motor Controller GND VSL CSC FAN7384 Rev.02 Figure 2. DC Motor Drive Application (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 2 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Internal Block Diagram 14 UVLO VB DRIVER PULSE GENERATOR HS(ON/OFF) NOISE CANCELLER R S R Q 13 HO 12 LIN 1 SCHMITT TRIGGER INPUT VDD_UVLO UVLO VS 4 DRIVER VDD HIN 3 SHOOT-THROUGH PREVENTION LS(ON/OFF) GND/VSL LEVEL SHIFTER DELAY 9 LO SD 2 CONTROL LOGIC 8 FAULT LOGIC SOFT-OFF ISOFT ONE-SHOT TRIGGER 0.5V VDD_UVLO ONE-SHOT TRIGGER VSL CSC 6 5 FO GND 7 FAN7384 Rev.03 Figure 3. Functional Block Diagram (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 3 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Pin Configuration LIN SD HIN VDD FO CSC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VB HO VS NC NC LO VSL Figure 4. Pin Configuration (Top View) FAN7384 FAN7384 Rev.00 Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name LIN SD HIN VDD FO CSC GND VSL LO NC NC VS HO VB Description Logic Input for low-side gate driver Shutdown control input with active low Logic Input for high-side gate driver Low-side power supply voltage Bi-direction fault pin with open drain Short-circuit current detection input Ground Low-side supply offset voltage Low-side gate driver output Not connection Not connection High-side floating supply offset voltage High-side gate driver output High-side floating supply voltage (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 4 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C, unless otherwise specified. Symbol VS VB VHO VDD VIN VCSC VFO dVS/dt PD(2)(3)(4) JA TJ TS Notes: Parameter High-side offset voltage VS High-side floating supply voltage VB High-side floating output voltage Low-side and logic-fixed supply voltage Logic input voltage (HIN, LIN, SD) Current sense input voltage Fault output voltage Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature Min. VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 -0.3 Max. VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 VDD+0.3 50 1.0 110 150 Unit V V V V V V V V/ns W C/W C C -55 150 2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VB VS VDD VHO VLO VIN VFO TA Parameter High-side floating supply voltage High-side floating supply offset voltage Supply voltage High-side output voltage Low-side output voltage Logic input voltage (HIN, LIN, SD) Fault output voltage Ambient temperature Condition Min. VS+13 6-VDD 13 VS GND GND -0.3 -40 Max. VS+20 600 20 VB VDD VDD VDD+0.3 125 Unit V V V V V V V C (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 5 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Electrical Characteristics VBIAS (VDD, VBS) = 15.0V, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS and GND and are applicable to the respective outputs HO and LO. Symbol IQDD IPDD VDDUV+ VDDUVVDDHYS Characteristics Quiescent VDD supply current Operating VDD supply current VDD supply under-voltage positive going threshold Condition VLIN=0V or 5V fLIN=20kHz, rms value VDD=Sweep Min. Typ. Max. Unit 600 950 10.9 10.4 11.9 11.4 0.5 800 1300 12.9 12.4 A A V V V LOW SIDE POWER SUPPLY SECTION VDD supply under-voltage negative going VDD=Sweep threshold VDD supply under-voltage lockout hysteresis VBS supply under-voltage positive going threshold VDD=Sweep BOOTSTRAPPED POWER SUPPLY SECTION VBSUV+ VBSUVVBSHYS ILK IQBS IPBS VOH VOL IO+ IOVS VBS=Sweep 10.6 10.1 11.5 11.0 0.5 10 50 400 90 600 100 100 200 420 250 500 -9.8 -7.0 -7.0 7.0 1.2 2.5 2.5 1.2 0.5 VIN=5V VIN=0V 10 15 20 2.0 12.4 11.9 V V V A A A mV mV mA mA V V V V V V V A A VBS supply under-voltage negative going VBS=Sweep threshold VBS supply under-voltage lockout hysteresis Offset supply leakage current Quiescent VBS supply current Operating VBS supply current High-level output voltage, VBIAS-VO Low-level output voltage, VO Output HIGH short-circuit pulse current Output LOW short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO VBS=Sweep VB=VS=600V VHIN=0V or 5V fHIN=20kHz, rms value IO=0mA (No Load) IO=0mA (No Load) VO=0V, VIN=5V with PW<10s VO=15V, VIN=0V with PW<10s GATE DRIVER OUTPUT SECTION VSL-GND VSL-GND/GND-VSL voltage educability SHUTDOWN CONTROL SECTION (SD) SD+ SDVIH VIL VINHYS IIN+ IINShutdown "1" input voltage Shutdown "0" input voltage Logic "1" input voltage Logic "0" input voltage Logic input hysteresis voltage Logic "1" input bias current Logic "0" input bias current LOGIC INPUT SECTION (HIN, LIN) (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 6 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Electrical Characteristics (Continued) VBIAS (VDD, VBS) = 15.0V, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to GND and VS is applicable to HO and LO. Symbol Characteristics Condition Min. Typ. Max. Unit 0.47 0.50 10 10 0.53 15 15 -20 V A mA V SHORT-CIRCUIT PROTECTION VCSCREF Short-circuit detector reference voltage ICSCIN ISOFT -VCSC Short-circuit input current Soft turn-off source current Negative CSC pin immunity(5) VCSCIN=1V, RCSCIN=100K VDD=15V Voltage on CSC pin up to -12V, Time<2s 2.5 1.2 0.5 VCSC=0V, RPULL-UP=4.7K VCSC=1V, IFO=2mA VCSCIN=1V 60 4.7 0.8 100 5 5 FAULT DETECTION SECTION VFINH VFINL VFINHYS VFOH VFOL tFO Fault input high level voltage Fault input low level voltage Fault input hysteresis voltage(5) Fault output high level voltage Fault output low level voltage Fault output pulse width V V V V V s Note: 5. These parameters guaranteed by design. Dynamic Electrical Characteristics TA=25C, VBIAS (VDD, VBS) = 15.0V, VS = GND, CLoad = 1000pF unless otherwise specified. Symbol ton toff tr tf MT DT tUVFLT tCSCFLT tCSCFO tCSCLO tSDFO tSDOFF Parameter Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Delay matching Dead-time Under-voltage filtering time(5) CSC pin filtering time(5) FO(5) Time from CSC triggering to VS=0V Conditions VS=0V or 600V (5) Min. Typ. Max. Unit 180 170 50 30 80 120 16 300 350 600 60 100 260 240 100 80 50 170 ns ns ns ns ns ns s ns ns ns ns ns Time from CSC triggering to low-side From VCSC=1V to starting gate gate output(5) turn-off Shutdown to FO propagation delay(5) Shutdown to HIGH/LOW-side gate off(5) Note: 5. These parameters guaranteed by design. (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 7 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Characteristics 13.5 13.0 13.0 12.5 VDDUV+ [V] VDDUV- [V] -20 0 20 40 60 80 100 120 12.5 12.0 11.5 11.0 10.5 -40 12.0 11.5 11.0 10.5 10.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 5. VDD UVLO (+) vs. Temperature Figure 6. VDD UVLO (-) vs. Temperature 1.0 13.0 12.5 0.8 VDDHYS [V] 0.6 VBSUV+ [V] -20 0 20 40 60 80 100 120 12.0 11.5 11.0 0.4 0.2 10.5 10.0 -40 0.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 7. VDD UVLO Hysteresis vs. Temperature Figure 8. VBS UVLO (+) vs. Temperature 12.5 12.0 1.0 0.8 VBSUV- [V] 11.5 11.0 10.5 10.0 9.5 -40 VBSHYS [V] -20 0 20 40 60 80 100 120 0.6 0.4 0.2 0.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 9. VBS UVLO (-) vs. Temperature Figure 10. VBS UVLO Hysteresis vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 8 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 1000 100 800 80 IQDD [A] 600 IQBS [A] -20 0 20 40 60 80 100 120 60 400 40 200 20 0 -40 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 11. VDD Quiescent Current vs. Temperature Figure 12. VBS Quiescent Current vs. Temperature 1600 1400 1000 800 IPDD [A] IPBS [A] 1200 1000 800 600 400 -40 600 400 200 -20 0 20 40 60 80 100 120 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 13. VDD Operating Current vs. Temperature Figure 14. VBS Operating Current vs. Temperature 30 25 20 16 ICSCIN [A] -20 0 20 40 60 80 100 120 IIN+ [A] 20 15 10 5 0 -40 12 8 4 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 15. Logic Input Current vs. Temperature Figure 16. ICSCIN vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 9 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 20 120 100 15 ISOFT [mA] tr [nsec] -20 0 20 40 60 80 100 120 80 60 40 10 5 20 0 -40 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 17. ISOFT vs. Temperature Figure 18. Turn-on Rising Time vs. Temperature 100 300 250 80 60 ton [nsec] -20 0 20 40 60 80 100 120 tf [nsec] 200 150 100 40 20 50 0 -40 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 19. Turn-off Falling Time vs. Temperature Figure 20. Turn-on Delay Time vs. Temperature 300 250 3.0 2.5 2.0 toff [nsec] VIH [V] 200 150 100 50 0 -40 1.5 1.0 0.5 0.0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 21. Turn-off Delay Time vs. Temperature Figure 22. Logic Input High Voltage vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 10 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 3.0 2.5 1.0 0.8 VINHYS [V] -20 0 20 40 60 80 100 120 VIL [V] 2.0 1.5 1.0 0.5 0.0 -40 0.6 0.4 0.2 0.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 23. Logic Input Low Voltage vs. Temperature Figure 24. Logic Input Hysteresis vs. Temperature 3.0 2.5 3.0 2.5 SDBAR+ [V] SDBAR- [V] 2.0 1.5 1.0 0.5 0.0 -40 2.0 1.5 1.0 0.5 0.0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 25. SD Positive Threshold vs. Temperature Figure 26. SD Negative Threshold vs. Temperature 0.60 2.4 2.0 0.55 VCSCREF [V] 0.50 VFINH [V] -20 0 20 40 60 80 100 120 1.6 1.2 0.8 0.45 0.4 0.40 -40 0.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 27. VCSCREF vs. Temperature Figure 28. Fault Input High Voltage vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 11 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 6.0 1.0 0.8 5.6 VFOH [V] VFOL [V] -20 0 20 40 60 80 100 120 0.6 5.2 0.4 0.2 4.8 0.0 -40 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 29. Fault Output High Voltage vs. Temperature Figure 30. Fault Output Low Voltage vs. Temperature -7 -8 -9 -10 -11 -12 -13 -40 200 160 DT [nsec] -20 0 20 40 60 80 100 120 VS [V] 120 80 40 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 31. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Temperature Figure 32. Dead Time vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 12 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Switching Time Definitions The overall switching timing waveforms definition of FAN7384 as shown Figure 33. LIN SD Low-Side Output Disable Shutdown Disable Skip Low-Side Output Disable VDD tUVFLT 0.5V UVLO- VCSC tCSCFO tCSCFO tFO tFO FO tCSCLO LO tCSCLO Under-Voltage Detection Point Soft-Off Operating Shutdown Enable Point Shutdown Disable Point Short-Circuit Detection Point Soft-Off Operating FAN7384 Rev.03 Figure 33. Switching Timing Waveforms Definition (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 13 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Typical Application Information 1. Protection Function 1.1 Under-Voltage Lockout (UVLO) The high- and low-side drivers include under-voltage lockout (UVLO) protection circuitry that monitors the supply voltage (VDD) and bootstrap capacitor voltage (VBS) independently. It can be designed to prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Moreover, the UVLO hysteresis prevents chattering during power supply transitions. If the supply voltage (VDD) maintains an under-voltage condition over under-voltage filtering times (typically 16s), the fault and soft-off circuits are activated, as shown Figure 34. HIN/LIN LIN/HIN Shoot-Through Prevent HO/LO After DT LO/HO FAN7384 Rev.01 LIN Figure 36. Waveforms for Shoot-Through Prevention UVLO+ UVLOtUVFLT VDD 1.3 Over-Current Protection Function The FAN7384 has over-current detection circuitry that monitors the current-by-current sensing resistor connected from the low-side switch source (VSL) to ground. It is a built-in time-filler from the over-current event to prevent malfunction from a noise source, such as leading-edge pulse in inductive load application, as shown Figure 37. The sensing current is calculated as follows: FO tCSCFO tFO LO FAN7384 Rev.01 t1 t2 90% tCSCLO t3 Figure 34. Waveforms for Under-Voltage Lockout ICS = 1.2 Shoot-Through Prevention Function The FAN7384 has a shoot-through prevention circuitry that monitors the high- and low-side inputs. It can be designed to prevent outputs of high- and low-side turning on at same time, as shown Figure 35 and 36. where, VCSCREF [ A] RCS (1) VCSCREF: Reference voltage of current sense comparator RCS: Current sensing resistor HIN/LIN LIN LIN/HIN Shoot-Through Prevent Low-Side Output Disable VCSC FO LO tCSCFO tFO tCSCLO 0.5V HO/LO After DT LO/HO After DT FAN7384 Rev.00 Soft-Off Short-Circuit Operating Detection Point FAN7384 Rev.03 Figure 35. Waveforms for Shoot-Through Prevention Figure 37. Waveforms for Short-Circuit Protection (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 14 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC 2. Layout Considerations For optimum performance, considerations must be taken during printed circuit board (PCB) layout. 2.2 Gate-Drive Loop Current loops behave like antennae, able to receive and transmit noise. To reduce the noise coupling/emission and improve the power switch turn-on and off performance, gate-drive loops must be reduced as much as possible. 2.1 Supply Capacitors If the output stages are able to quickly turn on a switching device with a high value of current, the supply capacitors must be placed as close as possible to the device pins (VDD and GND for the ground-tied supply, VB and VS for the floating supply) to minimize parasitic inductance and resistance. 2.3 Ground Plane To minimize noise coupling, the ground plane should not be placed under or near the high-voltage floating side. (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 15 www.fairchildsemi.com FAN7384 Half-Bridge Gate-Drive IC Package Dimensions 14-SOP Dimensions are in millimeters unless otherwise noted. MIN 1.55 0.10 0.061 0.004 0.05 0.002 #1 #14 8.70 MAX 0.343 8.56 0.20 0.337 0.008 #7 #8 6.00 0.30 0.236 0.012 1.80 MAX 0.071 +0.10 0.20 -0.05 +0.004 0.008 -0.002 3.95 0.20 0.156 0.008 5.72 0.225 0.60 0.20 0.024 0.008 0~ 8 January 2001, Rev. A Figure 38. 14-Lead Small Outline Package (SOP) (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 16 MAX0.10 MAX0.004 1.27 0.050 www.fairchildsemi.com +0.10 0.406 -0.05 +0.004 0.016 -0.002 ( 0.47 ) 0.019 FAN7384 Half-Bridge Gate-Drive IC TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTLTM Current Transfer LogicTM DOME 2 E CMOS (R) EcoSPARK EnSigna FACT Quiet SeriesTM (R) FACT (R) FAST FASTr FPS (R) FRFET GlobalOptoisolator GTO (R) HiSeC i-Lo ImpliedDisconnect IntelliMAX ISOPLANAR MICROCOUPLER MicroPak MICROWIRE MSX MSXPro OCX OCXPro (R) OPTOLOGIC (R) OPTOPLANAR PACMAN POP (R) Power220 (R) Power247 PowerEdge PowerSaver PowerTrench Programmable Active Droop (R) QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect ScalarPump SMART START (R) SPM SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 TCM (R) The Power Franchise TM (R) TinyLogic TINYOPTO TinyPower TinyWire TruTranslation SerDes (R) UHC UniFET VCX Wire (R) TinyBoost TinyBuck DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I23 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. No Identification Needed Full Production Obsolete Not In Production (c) 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 17 www.fairchildsemi.com |
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